0.01 RES-0001 selec-w false TEN-0001 tenders 1 t-esubm 1 t-sme 0 CON-0001 LOT-0000 TEN-0001 no TPA-0001 LOT-0000 TEN-0001 CON-0001 CON-0001 TEN-0001 TPA-0001 ORG-0001 29 false true https://vergabe.fraunhofer.de/ ORG-7001 Fraunhofer-Gesellschaft - Einkauf B12 Fraunhofer-Gesellschaft - Einkauf B12 Hansastraße 27c München 80686 DE212 DEU DE 129515865 Einkauf Betrieb und Infrastruktur +49891205-0 einkauf@zv.fraunhofer.de ORG-7004 Vergabekammern des Bundes Vergabekammern des Bundes Kaiser-Friedrich-Straße 16 Bonn 53113 DEA22 DEU t:022894990 +49 228 9499-0 vk@bundeskartellamt.bund.de https://www.fraunhofer.de ORG-7005 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Hansastraße 27c München 80686 DE212 DEU DE-129515865 +49 89 1205-0 einkauf@zv.fraunhofer.de false UBO-0001 large ORG-0001 Cadence Design Systems GmbH Cadence Design Systems GmbH Mozarstrasse 2 Feldkirchen 85622 DE21H DEU DE129309907 +49 8945631300 +49 8945631300 falbert@cadence.com ORG-7006Datenservice Öffentlicher Einkauf (in Verantwortung des Beschaffungsamts des BMI)Datenservice Öffentlicher Einkauf (in Verantwortung des Beschaffungsamts des BMI)Bonn53119DEA22DEU0204:994-DOEVD-83+49228996100noreply.esender_hub@bescha.bund.de UBO-0001 00774175-2024246/20242024-12-18+01:00 2.3 eforms-sdk-1.10 9911127f-e25f-47ad-81ab-72486f4d22bf 76445951-9b7e-4eeb-a054-2f7f6027a7ff 2024-12-17+01:00 10:46:05+01:00 01 2024-12-17+01:00 32014L0024 can-standard DEU ENG https://vergabe.fraunhofer.de/NetServer/ pub-undert gen-pub ORG-7001 ted-esenORG-7006 vgv neg-wo-call false artistic siehe Alleinstellungsbegründung See unique position PR868911-2440-P Digital design tools (FMD-IIS-SSE-Design-26) - PR868911-2440-P Digital design tools (FMD-IIS-SSE-Design-26) - PR868911-2440-P Digital design tools (FMD-IIS-SSE-Design-26) Digital design tools for physical chip implementation and verification with CPU accelerators supplies 48983000 Erlangen 91058 DE252 DEU LOT-0000 false no-eu-funds per-exa 100.00 price Preis Price Preis Price ORG-7001 ORG-7005 ORG-7004 true false none none LOT-0000 Digital design tools (FMD-IIS-SSE-Design-26) - PR868911-2440-P Digital design tools (FMD-IIS-SSE-Design-26) - PR868911-2440-P 1 Stück Digital design tools for physical chip implementation and verification with CPU accelerators For the development of demanding analog and high complex digital circuits with advanced requirements in chiplet design in nanometer silicon technologies a backend tool suite will be needed by Fraunhofer matching and complementing the existing tool family. An analog and digital backend chip design software will be required for the development of high complex and high performance chiplets from netlist and schematic to GDSII chip layouts in tiny nanometer technologies. This request for proposal covers digital design tools for physical chip implementation and verification with CPU accelerators. 1 Piece Digital design tools for physical chip implementation and verification with CPU accelerators For the development of demanding analog and high complex digital circuits with advanced requirements in chiplet design in nanometer silicon technologies a backend tool suite will be needed by Fraunhofer matching and complementing the existing tool family. An analog and digital backend chip design software will be required for the development of high complex and high performance chiplets from netlist and schematic to GDSII chip layouts in tiny nanometer technologies. This request for proposal covers digital design tools for physical chip implementation and verification with CPU accelerators. supplies none 48983000 Erlangen 91058 DE252 DEU 2024-12-31+01:00 2000-01-01+01:00